Fault coverage and shipped defect rate (DPPM) calculator
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KEY POINTS
Defects missed by test ship to customers, so the shipped defect rate follows DL = 1 − Y^(1−T) (Y: yield, T: fault coverage). At 85% yield and 99% coverage it is about 1,600 DPPM; holding it to 10 DPPM takes coverage in the 99.99% range. Automotive parts require below 1 DPPM, combining several fault models with outlier screening.
Inputs
The shipped defect rate is above target. Raise fault coverage to at least 99.994% or improve yield.
The Williams–Brown model is a conservative estimate that assumes every fault is equally likely to be detected and each defective chip has a single fault. Defective chips often have several faults, so actual DPPM tends to be lower at the same coverage. Current practice evaluates transition delay and cell-internal fault coverage alongside stuck-at coverage.
Fault coverage and shipped defect rate
Fault coverage needed for a target DPPM
| Target | Yield 50% | Yield 70% | Yield 85% | Yield 95% |
|---|---|---|---|---|
| 1000 DPPM | 99.8557 % | 99.7195 % | 99.3844 % | 98.0495 % |
| 100 DPPM | 99.9856 % | 99.9720 % | 99.9385 % | 99.8050 % |
| 10 DPPM | 99.9986 % | 99.9972 % | 99.9938 % | 99.9805 % |
| 1 DPPM | 99.9999 % | 99.9997 % | 99.9994 % | 99.9981 % |
| 0.1 DPPM | 100.0000 % | 100.0000 % | 99.9999 % | 99.9998 % |
Lower yield demands higher coverage
Defects missed by test ship to customers, so the shipped defect rate depends on both fault coverage and manufacturing yield. With high yield there are few defective chips to begin with, so a few misses still keep DPPM low. A product early in its ramp with low yield ships several times more defects at the same coverage.
Automotive semiconductors require below 1 DPPM (zero defects), combining more than 99% stuck-at coverage with transition delay and bridge fault coverage, IDDQ testing and outlier screening by part average testing (PAT). More ATPG patterns raise coverage but also test time and cost, and that balance is the central question in DFT design.
FAQ
What coverage is needed for 10 DPPM at 85% yield?
About 99.994%, from T = 1 − ln(1 − DL) / ln(Y).
Is the Williams-Brown model conservative?
Yes. It assumes each defective chip has a single fault. Real defective chips often have several, so actual DPPM tends to be lower at the same coverage.
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Last updated: October 23, 2026