PCIe and CXL bandwidth calculator
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KEY POINTS
PCIe bandwidth is transfer rate (GT/s) × lanes × encoding efficiency ÷ 8: about 63 GB/s one way for PCIe 5.0 x16 and about 118 GB/s for PCIe 6.0 x16. GT/s counts bit transfers, not data. CXL 2.0 uses the PCIe 5.0 physical layer and CXL 3.x uses PCIe 6.x.
Inputs
Payload bandwidth roughly subtracts TLP headers and DLLPs (ACKs and flow control); on real systems it is set by device processing and the DMA implementation. FLIT efficiency for PCIe 6.0 and later includes FEC and CRC.
Bandwidth by generation and lane count (one way, GB/s)
| Generation | Transfer rate | Encoding | x1 | x4 | x8 | x16 | Spec released |
|---|---|---|---|---|---|---|---|
| PCIe 1.0 | 2.5 GT/s | 8b/10b | 0.250 | 1.0 | 2.0 | 4.0 | 2003 |
| PCIe 2.0 | 5 GT/s | 8b/10b | 0.500 | 2.0 | 4.0 | 8.0 | 2007 |
| PCIe 3.0 | 8 GT/s | 128b/130b | 0.985 | 3.9 | 7.9 | 15.8 | 2010 |
| PCIe 4.0 | 16 GT/s | 128b/130b | 1.969 | 7.9 | 15.8 | 31.5 | 2017 |
| PCIe 5.0 / CXL 2.0 | 32 GT/s | 128b/130b | 3.938 | 15.8 | 31.5 | 63.0 | 2019 |
| PCIe 6.0 / CXL 3.x | 64 GT/s | PAM4, FLIT | 7.375 | 29.5 | 59.0 | 118.0 | 2022 |
| PCIe 7.0 | 128 GT/s | PAM4, FLIT | 14.750 | 59.0 | 118.0 | 236.0 | 2025 |
GT/s versus GB/s
PCIe speeds in GT/s (gigatransfers per second) count how many bits per second travel on one lane's signal pair, not the amount of data. Data is encoded to make the clock easy to recover (20% overhead for 8b/10b, about 1.5% for 128b/130b), so usable bandwidth is lower by that amount. From PCIe 6.0, signaling changed to four-level PAM4 with fixed-size packets (FLITs) that include error correction.
In AI servers, the bandwidth between GPU and CPU, between GPU and network card, and to CXL memory expansion shapes performance. PCIe roughly doubles in speed each generation, but signal loss grows with it, prompting lower-loss board materials, added retimers and discussion of a shift to optical links (co-packaged optics).
FAQ
What is the bandwidth of PCIe 5.0 x16?
32 GT/s × 16 lanes × 128/130 ÷ 8 is about 63 GB/s in each direction, about 126 GB/s in total.
What changed in PCIe 6.0?
It moved to four-level PAM4 signaling and fixed-size FLIT packets with forward error correction, doubling the rate to 64 GT/s.
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Last updated: October 23, 2026