HBM bandwidth calculator (GPU memory bandwidth and capacity)
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KEY POINTS
HBM bandwidth per stack is pin speed × interface width ÷ 8: about 1.2 TB/s for HBM3E (9.6 Gbps, 1024 bit) and about 2 TB/s for HBM4 (8 Gbps, 2048 bit). A GPU's total bandwidth multiplies this by the number of stacks. In batch-1 LLM inference every token reads all weights, so the generation speed ceiling is roughly bandwidth ÷ weight size.
HBM configuration
Product presets back-calculate the pin speed per stack from each vendor's published total bandwidth and capacity. As with the H200's 141 GB, a product's rated capacity can be slightly below the physical capacity.
LLM inference token rate (theoretical ceiling)
At batch size 1, every token requires reading all weights from HBM once, so the speed ceiling is roughly bandwidth ÷ weight size. This estimate excludes KV cache reads and compute time. Larger batches process several users with the same reads, raising overall throughput.
Bandwidth by HBM generation
| Generation | Pin speed | Interface width | Per stack | With 8 stacks |
|---|---|---|---|---|
| HBM2E | 3.6 Gbps | 1024 bit | 461 GB/s | 3.69 TB/s |
| HBM3 | 6.4 Gbps | 1024 bit | 819 GB/s | 6.55 TB/s |
| HBM3E | 9.6 Gbps | 1024 bit | 1.23 TB/s | 9.83 TB/s |
| HBM4 | 8 Gbps | 2048 bit | 2.05 TB/s | 16.38 TB/s |
What sets HBM bandwidth
HBM stacks DRAM dies vertically, connects them with TSVs and places them next to the GPU on an interposer. Each stack has a very wide interface of 1024 bits (2048 bits for HBM4), so even though each pin is slower than GDDR, the sheer number of pins gives an order of magnitude more bandwidth. GDDR6X is 32 bits per chip, so even at 21 Gbps one chip delivers 84 GB/s.
Bandwidth can be raised by increasing pin speed, widening the interface or adding stacks. The number of stacks is limited by the GPU's perimeter and the size of the interposer, which is why HBM4 doubled the interface width.
FAQ
How much bandwidth does one HBM3E stack provide?
At 9.6 Gbps on a 1024-bit interface, 9.6 × 1024 ÷ 8 is about 1.2 TB/s per stack.
Why does HBM4 double the interface width?
The number of stacks is limited by the GPU's perimeter and the interposer size, so widening each stack's interface to 2048 bits raises bandwidth without more stacks.
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Last updated: October 23, 2026