Memory bandwidth calculator (DDR, LPDDR, GDDR)
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Peak memory bandwidth is the transfer rate × bus width ÷ 8: one DDR5-6400 DIMM (64 bit) gives 51.2 GB/s, and two channels 102.4 GB/s. A high-end GPU with GDDR6X at 21 Gbps on a 384-bit bus reaches about 1 TB/s. Real applications see 60 to 90% of the theoretical value because of refresh and bank conflicts.
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Peak bandwidth is the theoretical maximum. Real applications typically see 60 to 90% of it because of refresh, bank conflicts, read/write turnarounds and access patterns. ECC bits are not counted in the bandwidth.
Bandwidth by memory standard (per channel or per chip)
| Standard | Pin speed | Bus width | Bandwidth | Notes |
|---|---|---|---|---|
| DDR4-3200 | 3.2 Gbps | 64 bit | 25.6 GB/s | One DIMM = 64 bit |
| DDR5-6400 | 6.4 Gbps | 64 bit | 51.2 GB/s | One DIMM = 2 subchannels × 32 bit |
| DDR5-8800 (MRDIMM) | 8.8 Gbps | 64 bit | 70.4 GB/s | High-speed server DIMM |
| LPDDR5-6400 | 6.4 Gbps | 16 bit | 12.8 GB/s | One channel = 16 bit |
| LPDDR5X-8533 | 8.5 Gbps | 16 bit | 17.1 GB/s | One channel = 16 bit |
| GDDR6 16Gbps | 16.0 Gbps | 32 bit | 64.0 GB/s | One chip = 32 bit |
| GDDR6X 21Gbps | 21.0 Gbps | 32 bit | 84.0 GB/s | One chip = 32 bit (PAM4) |
| GDDR7 32Gbps | 32.0 Gbps | 32 bit | 128.0 GB/s | One chip = 32 bit (PAM3) |
DDR, LPDDR, GDDR and HBM compared
Memory bandwidth is the speed per pin times the number of pins. DDR prioritizes the flexibility of replaceable DIMMs and builds bandwidth from 64-bit channels and the number of channels. LPDDR lowers the voltage for smartphones and laptops, sits right next to the SoC and uses many 16-bit channels. GDDR pushes pin speed as far as possible for GPUs, reaching 20 to 30 Gbps or more per pin with multi-level PAM4 and PAM3 signaling.
HBM keeps pin speed modest but stacks DRAM with TSVs and connects it to the processor on an interposer through thousands of wires, giving an enormous bus width of 1024 bits per stack (2048 bits for HBM4). AI GPUs use HBM because memory bandwidth, not compute, becomes the bottleneck.
FAQ
How is DDR5 bandwidth calculated?
Multiply the transfer rate in MT/s by the bus width in bits and divide by 8. DDR5-6400 × 64 bit ÷ 8 = 51.2 GB/s per DIMM.
Why do AI GPUs use HBM instead of GDDR?
HBM stacks DRAM with TSVs and connects it through an interposer with a 1024-bit bus per stack (2048 bits for HBM4), giving far more bandwidth than GDDR at a lower pin speed.
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Last updated: October 23, 2026