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Chip cost calculator (wafer price ÷ good dies)

Fab economics and operations. Everything is calculated in your browser; nothing you enter is sent to a server.

KEY POINTS

The silicon cost of a chip is the wafer price ÷ (dies per wafer × yield). Doubling the die area roughly halves the dies per wafer and lowers yield at the same time, so cost per chip more than doubles. Leading-edge wafers cost more and have higher defect density, which penalizes large dies most, and that is why chips such as AI GPUs are moving to chiplets.

Inputs

Cost per good chip$199
Of which silicon (wafer price ÷ good dies)$199
Dies per wafer (DPW)148dies
Yield (Murphy model)67.9%
Good dies100per wafer

Preset wafer prices are rough figures based on press reports and analyst estimates, not official foundry prices. Real prices vary widely by customer, volume and contract timing, so use them only for comparison. Assembly and test cost ranges from tens of cents to hundreds of dollars depending on the package, so it defaults to 0.

Silicon cost when split into chiplets

Silicon cost when the same total area is split into N chiplets (excluding assembly, test and extra area for die-to-die links).
PiecesSize of eachDies per waferYieldCost per pieceTotal for N
1 (monolithic)20.0×20.0 mm14867.9 %$199$199
2 pieces10.0×20.0 mm29982.1 %$81.43$163
4 pieces10.0×10.0 mm61290.6 %$36.09$144
8 pieces5.0×10.0 mm1,23695.1 %$17.01$136

Splitting makes each die smaller, so yield rises and less silicon is thrown away. Real chiplets, however, add die-to-die interface (PHY) area to every die, plus the cost and assembly yield of 2.5D/3D packaging. Even when the table total beats the monolithic die, the decision depends on whether that still holds after packaging costs.

What sets the cost of a chip

The silicon cost of a chip is the price of one wafer divided by the number of good dies it yields. That denominator is dies per wafer times yield, and both get worse as the die grows. Doubling the area roughly halves the dies per wafer and lowers yield at the same time, so cost per chip more than doubles.

Leading-edge wafers are more expensive and defect density is higher early in a node, so the cost of large dies climbs steeply. This is why chips close to the reticle limit (about 26 × 33 mm), such as AI GPUs, are moving to chiplets.

FAQ


Are the preset wafer prices official?

No. They are rough figures based on press reports and analyst estimates. Real prices vary by customer, volume and contract timing.

Are chiplets always cheaper?

Not necessarily. Smaller dies yield better, but chiplets add die-to-die interface area and the cost and assembly yield of 2.5D or 3D packaging.

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Last updated: October 23, 2026